(Last chance to ask questions) Telegrams for Guest: Founder of SemiWiki, Daniel Nenni

What is the best ever GPU architecture, and why is it Vega?

KarbinCry

Do you think that Intel will go fabless like AMD? If so who do you think they will partner with?

PotatoesAreLyfe

Also, what is your view and knowledge about the emerging foundry business model from the like of SkyTech and Tokyo Boeki Group of catering to start-ups and smaller customers by providing low-scale R&D production and custom manufacturing processes? SOURCES: > https://semiengineering.com/skywater-the-right-foundry-at-the-right-time/ > https://bits-chips.nl/artikel/small-series-of-chips-profitable-by-flexible-concept-minimal-fab/

What is the prevalence of open-source instruction sets and architectures like RISC-V and OpenPower on the market today? Are they still mostly in R&D and a handful of products (e.g. from Alibaba, Nvidia, Si-Five, and Kendryte) or are they gradually being integrated and adopted by more chip design houses like Broadcom, Quallcom, Samsung, MediaTek, Apple, AMD, and Intel?

Hey Tom, very interesting guest! I got a couple for him: 1. Does Daniel have an opinion on a fab independent metric for measuring a processes density? Steve at GN talked about a paper a while back that proposed a trifecta of numbers representing density of different transistor constructs. 2. Is there any up and coming player on the fab horizon that we should be aware of? It seems Samsung took the spot that GloFo left open, but they also struggle big time with delivery on their given time line. Anyone outside of these four? Thanks!

dj5k

Hi Tom I know my question is a bit crazy but should Intel also consider going fabless if they can't manage 7 nm or is this just to important for them? I feel like they have to proove it in order not to loose theire face.

Is there anyone but ASML making EUV machines, or do they have the market cornered? What do you think their outlook is like? I have $ burning a hole in my pocket and looking to diversify

ishould

Two questions: Firstly something that likely will be covered in other people's questions as well, could you explain about the different levels of nodes, comparing the role within the industry of leading edge nodes with that of older, cheaper nodes. I think many people get the impression that only the cutting edge nodes are relevant, and everything else is left behind as soon as it is overtaken by a new, more dense node. Secondly, rather broadly, is there a growing rift between these leading edge devices and those built for more cost constrained sectors? How has design and verification changed in recent years with the rising difficulty of accessing the newest nodes, accompanied by more difficult to implement features such as serial-speed memory/interconnects and specialised circuitry like internal voltage regulation and other non-logic elements becoming commonplace on leading edge designs?

qhfreddy

Who do you see as the market differentials for zen3+vega vs zen2+rdna2? Seems like people that want the best of both worlds won't be getting them until at least late next year. What do you think the holdup for zen3 + rdna2 is?

ishould

Is there anyone set for a "comeback" to challenge TSMC in the next 5 to 10 years? Seems like they're running away with it with the successful 5nm rollout happening faster than any other node.

ishould

How soon do you feel that some of the growing Chinese fabs will become competitive in the global market? Do you see them as a more of potential budget node competitor over the next 3-5 years or do you think Big Red is just gonna hack it's way to the top?

I don't know how busy Intel's fabs are in 2020. For those sources of production to stay relevant they need to be either cutting edge or near it. Otherwise, customers will go elsewhere. Maybe it's certain engineering talent?

Ricky Tan (I survived Rush Hour 2)

I recently watched a video on Intel by an ex-engineer Francois Piednoel on the state of Intel - https://youtu.be/fiKjzeLco6c Do you think that things at Intel are as bad as he suggests or can the restructuring stop Intel becoming the next GE?

Ian Clifford

In July 2019 Bob Swan publicly admitted that Intel was "too aggressive" with density scaling from P1272 to P1274, but also noted that "Our 7nm node will be out in [Q2 2021] and it will be a 2.0X scaling, so back to the historical Moore's Law curve". Given the (publicly announced) delays to P1276 on top of this, it's clear that progress is not being made at the rate that Intel would prefer. In your opinion, how much of the delay would you attribute to the following... 1) Unrealistic goals; 2) Poor risk and project management; 3) Lack of investment and direction; ...and are there any other factors that you think have or will continue to aggravate the delays?

Sayonara

Oh, this is a great guest! I have two separate questions. 1) Do you have any accessible resources to learn more about semiconductor engineering? I've read your articles with great interest, but I get a bit lost when you start talking about process characteristics such as poly pitch or gate length. 2) Could you go into more detail as to what made Intel fall behind in process technology? I often hear that Intel failed because of bad management and the like, but I don't know much about the actual design choices that also led to this failure. (The one I remember the most was trying quad patterning for 10nm for example.)

Companies such as 3DFX, AMD, INTEL, and some others all have invested at one point into owning their own production foundries, and in some cases, it leads up to their death or near-death of those companies. While it seems like a good idea to produce your own designs, it always seems to come back to be their own downfall. Why are large companies such as Intel who owns their own sources of production begin to fall way behind the curve to its competition?

Vipast

Grab Bag, pick any you want to address:. -1) Will we ever see exclusively EUV nodes or will it always be used for a percentage of the layers in conjunction with immersion lithography and other techniques? -2) My understanding of EUV lithography is that the light source is elemental Tin (Sn) that is vaporized by some insane ArF laser with over 40kW output. High NA EUV sources will need to be even more powerful. What are some of the biggest hurdles to moving forward with more advanced nodes like 5/3nm and beyond; is it the light source, the optics, the masks or all of the above? -3) Could you talk a little bit about how multi-patterning works? I know it's a useful technique for when the feature detail is smaller than the resolution of the optical projection system. Is multi-patterning still used w/ EUV litho? Care to give a summary of multi-patterning for dummies? 4) I'd like to know anything you have to share about masks. How the hell do they put a protective layer over them while keeping it transparent/reflective to EUV? How much data is contained in an average mask? How are they made?

Andrew S

What happened to GlobalFoundries? Did they just get left in the dust and become irrelevant compared to TSMC, Samsung, and Intel? I haven't heard anything about them since their IP dispute with TSMC.

pyroxide

With Intel having their own fabs, does it make more sense to have them "outsource" their GPUs to TSMC rather than keep it in-house to free up those wafers for their real money makers (i.e. CPUs)?

extramossy

So one of the bottlenecks to ramping up new nodes appears to be how quickly fabs can get ahold of the lithography equipment from ASML. Are they the only game in town for cutting edge nodes or is there someone even remotely competitive with them?

Andrew S