furrtek

Progress April - I : Faster waves

In the previous post, I wrote about Wavedrom to draw chronograms from obervations, measures and notes. I was already getting slowdowns due to the size of the data (not that big) and finally got to the...

Progress March - IV : More waves

Representing chronograms in Notepad started to get confusing.

While searching for a graphic editor, I discovered Wavedrom . It's a js...

Progress March - III : Measurements

Instead of trying to guess the correct timings for the fix render cycle, I wired up the logic analyzer again and spent half the day recording everything between LSPC and B1. I now have 6kB worth of no...

Some PCB work

Slowed down verilog work after finally breathing some fresh air.

Did some component selection, and a bit of schematic and PCB work for the test board, since it will be made. Thanks to Marshall H. fo...

Progress March - II : Fix rendering works !

...from a tilemap snapshot ;)

In the last post I was aiming at making ao68000 run at least up to the MVS checks. I actually got fed up of trying to debug a poorly documented core, so I switched ...

Progress March - I

These last days consisted of blind-writing verilog with inspiration from the neogeodev wiki and MAME's source. Started hooking up the ao68000 68k CPU core yesterday, to test bus control and address de...

Setting things up

This is a free post, nobody will be charged for this month.

Thanks to your support, I'll be able to make some CPLD boards with practical connectors to validate the definition of some of the simp...