Finally something meaningful for those who simply want to enjoy playing games without thinking about the technical stuff:
We have a basic NeoGeo core for MiSTer running !
Take a look at...
2019-01-25 15:47:03 +0000 UTC
View Post
I finally yielded to pressure from the many e-mails and tweets asking if a MiSTer core was going to be made for the NeoGeo :(
Just joking, it was a decision :)
A decision which was rather easy to...
2018-11-06 19:17:07 +0000 UTC
View Post
Short video update as I didn't have much time to spend on the project these last months. I did get a minimal setup to run on the Terasic DE-1 dev board (Altera FPGA).
It runs the TG68k 68000 core, t...
2018-10-12 11:32:07 +0000 UTC
View Post
Quick update with a pretty bad looking 3D preview of the testing board.
Routing is done locally but the groups aren't connected together yet, so stuff can (and will) still be moved around.
To ...
2018-06-14 04:04:04 +0000 UTC
View Post
Here it is ! After I finished tracing the NEO-B1 die picture earlier than I thought (lots of parallel stuff in it), I translated the schematic to verilog and spent about 5 days trying to get the simul...
2018-04-28 21:10:07 +0000 UTC
View Post
I'm still alive and the tracing of NEO-B1 is going smoothly.
I should be able to start translating the schematic to Verilog next month.
No surprises in this chip, everything is pretty straightfor...
2018-04-14 10:58:41 +0000 UTC
View Post
John got to image NEO-B1, the second chip responsible for video on the NeoGeo: https://siliconpr0n.org/map/snk/neo...
2018-03-27 02:45:52 +0000 UTC
View Post
I just exported all the LSPC2 schematic sheets to png files and pushed them to Github: https://githu...
2018-02-27 06:57:44 +0000 UTC
View Post
It took about 110 hours to completely trace the LSPC2 chip die and draw the schematic using symbols representing the cells.
As already said, my wrist was giving up sometimes but it always recovered ...
2018-02-10 02:23:38 +0000 UTC
View Post
I've spent 56 hours until now identifying cells and tracing metal in LSPC2-A2 (the main video chip) and things are going smoothly, even if I had to take extended breaks because of wrist and shoulder p...
2018-01-18 07:50:26 +0000 UTC
View Post
The high-resolution die picture of LSPC (the NeoGeo video controller chip) is here !
John McMaster submitted it to his website siliconpr0n.org just a few days after receiving the envelope from Franc...
2018-01-03 15:27:42 +0000 UTC
View Post
Guesswork does get elements to function individually, but piecing them together often reveals that they're not that accurate because they don't stick as a whole.
I was bitten by this more than once ...
2017-12-14 05:12:57 +0000 UTC
View Post
Almost 6 months without an update, nothing unusual or unplanned... :)
Here's something for the eyes: progress of the video output spit out by the logic simulation. Sprites (almost everything except ...
2017-10-23 07:00:03 +0000 UTC
View Post
Last week-end, I attended a french arcade event organized by HFS (https://www.hfsplay.fr/). I met great, passionate people, played ver...
2017-05-12 02:18:10 +0000 UTC
View Post
If you recall one of the first posts, I showed the video output of a simulation which rendered Puzzled/Joy Joy Kid's fix layer (used for text, HUDs, scores, lifebars...).
That was done with on...
2017-03-31 10:11:50 +0000 UTC
View Post
Still working from time to time on the project. I recently did some schematic drawing and coarse component placement on the main board.
External memories, video and audio DAC, and basic I/O like deb...
2017-03-09 13:20:31 +0000 UTC
View Post
Getting back to work on the project now that the move's over with.
Got the first die pictures of the revered YM2610 and started tracing some easy stuff.
Yamaha's FM logic isn't that obscure th...
2017-01-11 16:31:53 +0000 UTC
View Post
The preliminary YM2610 ADPCM and timers code is on Github, and a few YM2610 were sent to someone who has hydrofluoric acid and a good microscope :)
Also sending the FPGA board to fab next week.
2016-11-22 12:11:48 +0000 UTC
View Post
Didn't expect to get this part of the YM2610 done before the SSG ! Maybe because the SSG is mainly used just for the coin-in sounds...
Anyways, I shot this video a few days ago and didn't write a pr...
2016-11-15 23:14:42 +0000 UTC
View Post
Spent 2 hours stripping a dead MV4 board I had since years.
This will greatly help verify and simplify logic for the NEO-D0, NEO-F0, and NEO-I0 chips.
2016-10-11 17:14:24 +0000 UTC
View Post
Shortly after the last post, I noticed that there was quite an important shortcut taken to get the system ROM to start the game: the Z80 wasn't running properly.
The system ROM didn't give the famil...
2016-10-10 12:55:14 +0000 UTC
View Post
And I thought that I'd post updates 6 weeks apart at the very worst...At least I have some news to bring !
First of all, about the hardware: I will finally be ordering the 4-layer FPGA board as soon...
2016-10-02 05:54:26 +0000 UTC
View Post
After almost a month long break, I'm getting back to probing boards with the aim of finishing the basics: Reset, watchdog, address decoding, and video sync. I'm still discovering new stuff !
The...
2016-06-15 13:39:17 +0000 UTC
View Post
Back home, so just a quick post to show what I received from Avnet a few days ago.
As usual with big distributors, the parcel's size was inversely proportional to the component's.
From lef...
2016-05-23 23:51:37 +0000 UTC
View Post
I knew two things would happen: ridiculous customs fees, and package that arrives just when I leave. As predicted, I got a $60 bill from DHL (on a $140 order), and their delivery guy arrived 2 hours a...
2016-05-19 13:08:41 +0000 UTC
View Post
After losing half my hair at attempting to make AO68000 work, I gave up and followed the advice I was given: switch to TG68K.
Great news: after less than a day of work, I got it set up good e...
2016-05-14 16:41:02 +0000 UTC
View Post
Is it May already ? This is a paid post. Thanks everyone for your support :)
Here are the latest news, what has been done and what needs to be done:
Regarding logic:
I recently moved...
2016-04-30 22:18:22 +0000 UTC
View Post
Talking with a friend about FPGA development boards made me realize how painful it would be to have the FPGA fail on the verification board, knowing it would be in BGA and next to a bunch of other com...
2016-04-22 05:33:10 +0000 UTC
View Post
Did some PCB work for the parts that won't be changing. Changed the 245 latches from SOIC to QFN to save space and reduce the board's size as much as possible.
Not sure if the memory card is a good ...
2016-04-18 01:03:18 +0000 UTC
View Post
Did some more component selection, most of the ICs are chosen.
Still nothing definitive, and the people making the IcoBoard informed me that their hardware might suit my needs. Decisions will have t...
2016-04-09 14:46:44 +0000 UTC
View Post